View CHR3794-QDG20_7907970.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

chr3694 - qdg rohs compliant ref. dschr3694 - qdg1192 - 11 jul 11 1 / 18 specifications subject to change without notice united monolithic semiconductors s.a.s. route dpartementale 128 - bp46 - 91401 orsay cedex france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 37 - 40ghz integrated down converter gaas monolithic microwave ic in smd package description the chr3694 - qdg is a multifunction chip, which integrates a balanc ed cold fet mixer, a time two multiplier, and a rf lna including gain control. it is designed for a wide range of applications, typically commercial communication systems. the circuit is manufactured with a phemt process, 0.25m gate length, via holes through the substrate and air bridges. it is available in lead - free smd package. a mirror version versus rf & lo access is available as chr37 94 - qdg. main features broadband performance 37 - 40ghz 12db g ain 15dbc image frequency rejection - 5dbm iip3 4db gain control dc power consumption: 4v, 150 ma 24l - qfn4x4 esd protected msl level 1 conversion gain (sup. mode) @ if =2ghz main characteristics tamb = +25c , vdl= vdx= 4v symbol parameter min typ max unit f rf rf frequency range 37 40 ghz f lo lo frequency range 17.5 21 ghz f if if frequency range dc 3.5 ghz g conversion gain @ vgc= - 2v conversion gain @ vgc=0v 8 11 10 14 db db esd protections: electrostatic discharge sensitive device observe handling precautions! ums r3694 yyww ? ? 0 2 4 6 8 10 12 14 16 18 20 36 37 38 39 40 41 rf frequency (ghz) conversion gain (db) gain @ 0v gain @ -2v ums a3667a yywwg ums a3667a yywwg ums a3688a yywwg ums a3667a yywwg ums a3667a yywwg ums a3688a yywwg
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 2 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 electrical characteristics tamb= +25c, vdl= vdx= 4v, typical vgx = - 0.9v & vgm= - 0.7v symbol parameter min typ max unit f rf rf frequency range 37 40 ghz f lo lo frequency range 17.5 21 ghz f if if frequency range dc 3.5 ghz g conversion gain @ vgc = - 2v conversion gain @ vgc = 0v 8 11 10 1 4 db db plo lo input power 1 dbm ifr image frequency rejection (1) 13 15 dbc nf noise figure @ vgc = - 2v , for if>0.1ghz noise figure @ vgc = 0v , for if>0.1ghz 5 4.5 6.5 6 db db iip3 input ip3 - 5 dbm lo rl input lo return loss - 10 - 8 db rf rl input rf return loss - 4 - 3 db gc gain control range 4 db vdl,vdx drain bias voltage 4 v vgc gain control voltage (2) - 2 0 v idl + idx bias current @ vgc = - 2v (3) bias current @ vgc = 0v (3) 100 110 140 150 180 190 ma ma (1) with external i/q 90 hybrid coupler (2) idl=50ma@vgc= - 2v, idl= 60ma@vgc=0v (3) typically, idl=60ma@vgc=0v, idx=90ma these values are representative of onboard measurements as defined on the drawing at page 16 for chr3694 - qdg and page 17 for chr3794 - qdg .
37 - 40ghz down converter chr3694 - qdg ref.: dschr3694 - qdg1192 - 11 jul 11 3 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 absolute maximum ratings (1) tamb = +25c symbol parameter values unit vdl,vdx maximum drain bias voltage 4.5 v idl + idx maximum drain bias current 200 ma vgm,vgx gate bias voltage - 2.0 to +0 v vgc control gain voltage - 3.0 to +4 v p_rf maximum rf input power 10 dbm p_lo maximum lo input power 10 dbm tch maximum channel temperature 175 c ta operating temperature range - 40 to +85 c tstg storage temperature range - 55 to +125 c (1) operation of this device above anyone of these paramaters may cause permanent damage.
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 4 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 device thermal performances all the figures given in this section are obtained assuming that the qfn device is cooled down only by conduction through the package thermal pad (no convection mode considered). the temperatur e is monitored at the package back - side interface (tcase) as shown below. the system maximum temperature must be adjusted in order to guarantee that tcase remains below than the maximum value specified in the next table. so, the system pcb must be designed to comply with this requirement. a derating must be applied on the dissipated power if the tcase temperature can not be maintained below than the maximum temperature specified (see the curve pdiss. max) in order to guarantee the nominal device life time (mttf). max. junction temperature (tj max) : 144 c max. continuous dissipated power @ tcase= 85 c : 0,6 w => pdiss derating above tcase (1) = 85 c : 10 mw/c junction-case thermal resistance (rth j-c) (2) : <97 c/w min. package back side operating temperature (3) : -40 c max. package back side operating temperature (3) : 85 c min. storage temperature : -55 c max. storage temperature : 125 c (1) derating at junction temperature constant = tj max. (2) rth j-c is calculated for a worst case where the hotter junction of the mmic is considered. (3) tcase=package back side temperature measured under the die-attach-pad (see the drawing below). device thermal specification : chr3694-qdg 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 -50 -25 0 25 50 75 100 125 tcase (c) pdiss. max. (w) pdiss. max. (w) tcase example of qfn 16l 3x3 back-side view, temperature reference point (tcase) location.
37 - 40ghz down converter chr3694 - qdg ref.: dschr3694 - qdg1192 - 11 jul 11 5 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical measured performance s tamb = +25c, vdx=vdl = 4v, typical vgx = - 0.9v & vgm= - 0.7v, p_lo=1dbm these values are representative of onboard measurements (on connector access planes) as defined on the drawing 97 445 page 1 6 for chr3694 - qdg and drawing 97342 page 1 7 for chr3794 - qdg . the board loss is estimated to 2 to 3db in the frequency range. conversion gain @ freq_if= 2ghz, f_rf= 2xf_lo - f_if, vgc=0v versus temperature conversion gain @ freq_if= 2ghz, f_rf= 2xf_lo - f_if, vgc= - 2v versus temperature 0 2 4 6 8 10 12 14 16 18 20 36 37 38 39 40 41 rf frequency (ghz) conversion gain (db) gc max @ -40c gc max @ +25c gc max @ +75c 0 2 4 6 8 10 12 14 16 18 20 36 37 38 39 40 41 rf frequency (ghz) conversion gain (db) gc min @ -40c gc min @ +25c gc min @ +75c
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 6 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 conversion gain @ freq_if= 3.5 ghz, f_rf= 2x f_lo + f_if , vgc=0v versus temperature conversion gain @ freq_if= 3.5 ghz, f_rf= 2x f_lo + f_if , vgc= - 2v versus temperature 0 2 4 6 8 10 12 14 16 18 20 36 37 38 39 40 41 rf frequency (ghz) conversion gain (db) gc max @ -40c gc max @ +25c gc max @ +75c 0 2 4 6 8 10 12 14 16 18 20 36 37 38 39 40 41 rf frequency (ghz) conversion gain (db) gc min @ -40c gc min @ +25c gc min @ +75c
37 - 40ghz down converter chr3694 - qdg ref.: dschr3694 - qdg1192 - 11 jul 11 7 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 image rejection @ freq_if= 2 ghz , vgc=0v versus temperature noise figure @ freq_if= 3 ghz , vgc=0v versus temperature rem : the losse s due to board are removed for noise measurements . 0 5 10 15 20 25 30 35 40 17 17.5 18 18.5 19 lo frequency (ghz) image rejection (db) -40c +25c +75c 0 1 2 3 4 5 6 7 8 36 37 38 39 40 41 rf frequency (ghz) noise figure (db) nf @ -40c nf @ +25c nf @ +75c
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 8 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 noise figure @ freq_if= 3ghz versus vgc at 25c rem : the losses due to board are removed for noise measurements . compression (sup. mode) @ freq_ rf= 38ghz, freq_ if= 2ghz versus p_rf & temperature 0 1 2 3 4 5 6 7 8 36 37 38 39 40 41 rf frequency (ghz) noise figure (db) nf @ 0v nf @ -2v 0 2 4 6 8 10 12 14 16 18 20 -24 -22 -20 -18 -16 -14 -12 -10 -8 input power (dbm) gain (db) p1db 38ghz @ -40c p1db 38ghz @ +25c p1db 38ghz @ +75c
37 - 40ghz down converter chr3694 - qdg ref.: dschr3694 - qdg1192 - 11 jul 11 9 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 input ip3 @ freq_rf= 37.5 ghz & 39.5ghz, freq_ if= 3.5ghz versus vgc at 25 c lo return loss versus frequency -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 -30 -25 -20 -15 -10 input power double carrier (dbm) input ip3 (dbm) 37.5ghz / vgc=0v 39.5ghz / vgc=0v 37.5ghz / vgc=-2v 39.5ghz / vgc=-2v -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 14 15 16 17 18 19 20 21 22 23 frequency (ghz) lo return loss (db)
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 10 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 rf return loss versus frequency & vgc -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 30 31 32 33 34 35 36 37 38 39 40 frequency (ghz) rf return loss (db) vgc=0v vgc=-2v
37 - 40ghz down converter chr3694 - qdg ref.: dschr3694 - qdg1192 - 11 jul 11 11 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 package outline chr3694 - qdg (1) matt tin, lead free (green) 1 - nc 13 - gnd units mm 2 - gnd 14 - gnd from the standard jedec mo - 220 3 - gnd 15 - rf (vggd) 4 - lo 16 - gnd 25 - gnd 5 - gnd 17 - gnd 6 - gnd 18 - nc 7 - nc 19 - nc 8 - vgx 20 - nc 9 - vdx 21 - q 10 - vgm 22 - gnd 11 - vgc 23 - gnd 12 - vdl 24 - i r3694
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 12 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 package outline chr3794 - qdg (1) matt tin, lead free (green) 1 - nc 13 - gnd un its mm 2 - gnd 14 - gnd fr om the standard jedec mo - 220 3 - gnd 15 - lo ( vggd) 4 - rf 16 - gnd 25 - gnd 5 - gnd 17 - gnd 6 - gnd 18 - nc 7 - vdl 19 - i 8 - vgc 20 - gnd 9 - vgm 21 - gnd 10 - vdx 22 - q 11 - vgx 23 - nc 12 - nc 24 - nc ( 1) the package outline drawing included to this data - sheet is given for indication. refer to the application note an 0017 available at http://www.ums - gaas.com for exact package dimensions. it is strongly recommended to ground all pins marked gnd through the pcb board. ensure that the pcb board is designed to provide the best possible ground to the package. r3794
37 - 40ghz down converter chr3694 - qdg ref.: dschr3694 - qdg1192 - 11 jul 11 13 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 definition of the sij reference planes the reference planes used for sij measurements given above are symmetrical from the symmetrical axis of the package (see drawing beside) . the input and output reference planes are located at 3.18mm offset (input wise and output wise respec tively ) from this axis. then, the given sij pa rameters incorporate th e land pattern of the evaluation motherboard recommended at the page 16 . recomme nded package footprint refer to the application note an 0017 available at http://www.ums - gaas.com for package foot print recomm e ndations . smd mounting procedure the smd leadless package has been designed for high volume surface mount pcb assembly process. the dimensions and footprint required for the pcb (motherboard) are given in the drawings above. for the mounting process standard techniques involving solder p aste and a suitable reflow process can be used. for further details, see application note an0017. 3.18 3.18
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 14 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 note s due to esd protection, lo and rf access are dc grounded, an external capacitance might be requested to isolate the product from external voltage tha t could be present on the rf access. esd protections are also implemented on each gate access: vgx, vgm and vgc . refer to the application note an 0020 available at http://www.ums - gaas.com for general esd recommendations . chr36 94 - qdg chr3794 - qdg lo vg x i q vd x vgm rf vg c vd l lo i q rf vdx vgm vg c vd l vgx
37 - 40ghz down converter chr3694 - qdg ref. : dschr3694 - qdg C february 09 15 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 notes the biasing circuit s of the stages of the circuit are given in the schemes below. vd =4v stage 1 stage 2 stage 3 150 ? vgc = - 2v ? self - biased self - biased gain control self - biased 1.9k ? 1.9k ? 26 ? 100 ? 26 ? 100 ? 60 ? 60 ? 1.9k ? 9 ? 100 ? 21 ? in out lna vd =4v stage 1 stage 2 stage 3 150 ? vgc = - 2v ? self - biased self - biased gain control self - biased 1.9k ? 1.9k ? 26 ? 100 ? 26 ? 100 ? 60 ? 60 ? 1.9k ? 9 ? 100 ? 21 ? in out lna vdx =4v stage buffer 1 stage 2 times multiplier stage buffer 2 vgx self - biased self - biased 1.23k ? 10 ? 42 ? 200 ? 38 ? 1.23k ? 8 ? 57 ? lo in lo out lo vdx =4v stage buffer 1 stage 2 times multiplier stage buffer 2 vgx self - biased self - biased 1.23k ? 10 ? 42 ? 200 ? 38 ? 1.23k ? 8 ? 57 ? lo in lo out lo vgm 1.2k ? 0.5 ? 0.5 ? vgm 1.2k ? 0.5 ? 0.5 ?
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 16 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 evaluation mother board ? compatible with the proposed footprint. ? based on typically ro4003 / 8mils or equivalent. ? using a microstrip to coplanar transition to access the package. ? recommended for the implementation of this product on a module board. ? decoupling capacitors of 10nf ? 10% are recommended for all dc accesses. ? coupleur anaren 2 - 4ghz ? (see application note an00 17 for details). proposed assembly board 97445 for chr3694 - qdg 24l - qfn4x4 products characterization decoupling capacitor: 10nf vgx q i vdx vgm vgc vdl
37 - 40ghz down converter chr3694 - qdg ref. : dschr3694 - qdg C february 09 17 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 proposed assembly board 97342 for chr3794 - qdg 24l - qfn4x4 products characterization vdl v gc v gm v dx v gx
chr3694 - qdg 37 - 40ghz down converter ref. : dschr3694 - qdg1192 - 11 jul 11 18 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 ordering information qfn 4x4 rohs compliant package : chr3694 - qdg/xy stick: xy = 20 tape & reel: xy = 21 qfn 4x4 rohs compliant package : chr3 7 94 - qdg/xy stick: xy = 20 tape & reel: xy = 21 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no respons i bility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolit hic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.

▲Up To Search▲

Price & Availability of CHR3794-QDG20

	To Download CHR3794-QDG20 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .